A receiver having a digital PLL circuitry has been proposed. In the receiver, after A/D conversion of a received RF signal including FSK data with frequency conversion, the digital PLL circuitry detects phase and frequency offset amounts between a transmitter and a receiver by an angle arithmetic circuitry, and based on the detected offset amounts, the digital PLL circuitry automatically corrects the phase and frequency offsets.
This type of conventional receiver detects the phase and frequency offset amounts using both of in-phase signal and a quadrature signal, and thus has a large circuit scale. The digital PLL circuitry including the angle arithmetic circuitry and the like also has a large circuit scale. It is therefore difficult to reduce power consumption.